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    • pmic was designed under 1uh condition for the best ripple and transient response. if the degradations in ripple and transient response are acceptable, 0.47uh can be an option.
    • the device address is 0x4b. please refer to figure4-3 of i²c device addressing of the datasheet.
    • 4 corner pads are shorted to exp-pad internally. it is recommended to solder such corner pads to ground.
    • please refer to the technical document of on the web site. bd71847mwv is no more available in mass production process.
    • 3.3v as the pull up source is acceptable even if dvdd is 1.8v. but nvcc_i2c of the i²c domain in soc should be 3.3v (the same voltage as the pull up source for pmic) and dvdd in pmic always needs to be 1.8v.
    • yes. 3.3v is acceptable for driving the control signals.
    • buck8 needs to be de-asserted earlier than buck7 for the memory requirement.
    • as the secure i²c access function, pmic prepares the reglock register which prohibits the unexpected i²c access during the operation. i²c access is locked by the register as the default setting.
    • buck5 supports 0.975v and not for 0.95v. but this situation is approved by nxp and addressed under the soc datasheet.
    • the output voltage for buck8 can be adjusted by u-boot in the initial startup depending on the memory type in use. the voltage change handled by u-boot is acceptable for pmic because the validity in the power sequence is confirmed by nxp and no other sideband effects are found during their validation.
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